The present invention relates to a picture signal processing circuit which performs a frequency conversion and an aspect ratio conversion by rising a picture memory such as a field memory, and which processes a converted picture signal to perform line to line operations in the vertical direction.
One example of the picture processing circuit is a converting circuit used in a MUSE-NTSC converter for the MUSE (Multiple Sub-sampling Encode) system proposed by NHK in Japan as an analog HDTV format. A MUSE-NTSC converting circuit shown, as an example, in FIG. 4 is designed to perform frequency conversion and conversion of an aspect ratio on a picture signal which have undergone a simplified MUSE decoder operation, and to perform a vertical enhancement on the converted picture signal.
The converting circuit shown in FIG. 4 includes a field memory 1, a timing generator means 2 and a vertical enhancer circuit 3. The field memory 1 receives the MUSE-decoded picture signal through its input port, and further receives a write clock of 16.2 MHz (fH=16.875 kHz), a read clock of 14 MHz (fH=15.75 kHz), and a write clear signal, a write inhibit signal and a read clear signal of the timing means 2.
The input picture signal is written into the field memory 1 in accordance with the write clock by using the write clear signal as a standard, and the stored picture signal is read out in accordance with the read clock based on the read clear signal. The write operation is inhibited and disabled during the input period of the write inhibit signal. In this way, the picture signal is converted in frequency and aspect ratio, and delivered from an output port of the field memory 1, to the vertical enhancer circuit 3.
The vertical enhancer circuit 3 has a series combination of two line memories 3a and 3a, and an operating section 3b. Picture signals corresponding to three horizontal lines are prepared by the line memories 3a and 3a, and supplied to the operating section 3b. The operating section 3b performs predetermined operations, and provides the output picture signals which have received the vertical enhancement.
This converting circuit requires two of the line memories 3a and 3a in order to obtain the picture signals of three horizontal lines. In general, (n-1) line memories are required in order to obtain picture signals corresponding to n horizontal lines simultaneously.